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Alpha release

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Expectations for Alpha Program

  • NetFPGA 2.1 hardware platform
    • Hardware from Digilent Inc. provided through Stanford University and loaned to end-user.
    • End-user responsible for installing NetFPGA at local site 
           as per directions below
   
    • End-user expected to contibute to Stanford's effort in testing the hardware and software.
      Different Alpha users may have different roles.
   
    • Stanford expects written feedback from Alpha users about their experiences with the NetFPGA.
  • Stanford has provided Digilent and End-user with Self-test bitfile with regression tests
    • CPCI
      • Reprogrammed
    • Virtex FPGA : Programmed
    • SRAM
      • Pattern test executed
    • DRAM
      • Pattern test executed
    • DMA
      • Block transfers across PCI bus tested
    • MDIO
      • 1000base-TX, Full Duplex checked
    • PHY
      • 1 Million packets transmitted and received
    • SATA
      • High-speed serial data transfer
  • Linux installation of nf Driver
    • End-user installs driver, as per instructions on self-test web page
    • Ethernet Interfaces: nf2c0 .. nf2c3 appear using ifconfig
    • Memory-mapped registers
  • Directions for running the self-test, on-line as: 
      http://netfpga.org/NetFPGA_Self_Test_Procedure/Setup_Selftest_Pkg.html
  • End-user will
    • run one or more packaged applications
    • build test cases for the hardware
    • complete survey
    • document the test cases for NetFPGA.org

Alpha Test Participants

Currently the alpha program includes the following participants:

  • Rice University (Board #13)
    • Project: Teach a CS344 Equivalent class on networking
    • Alpha role: Transfer courseware outside of Stanford
    • Lead: Dr Scott Rixner (Alpha user)
    • Student: Jeff Shafer (Alpha user):
    • Last contact: JWL to Jeff on 10/2; JWL to Jeff and Scott: Sent 10/4
    • Password: Yes (for Jeff)
  • ICSI: (board #28)
    • Project: Network Shunt
    • Alpha role: Alpha test the NIC release and contribute Click StressTest 2.0
    • Status: Has received hardware; SelfTest successful; now needs NIC code
    • Lead: Nick Weaver (Alpha user + Member on the NetFPGA developers email list)
    • Last contact: JWL to NickW on 9/24, 10/1
    • Password: yes
  • University of Toronto: (boards #22, #26, #27)
    • Project: Use NetFPGA in a workstation cluster
    • Alpha role: Test external deployment of 10+ NetFPGA systems. Alpha tester of ordering process for multiple NetFPGA platforms from Digilent Inc.
    • Lead: Yashar Ganjali: yganjali@cs.toronto.edu (Alpha user)
    • Student: Geoff Salmon (Alpha user)
    • Student: Monia Ghobadi
    • Email sent: JWL to Yashar, Geoff, Monia: 10/4/07
      • Yashar agrees to join Alpha project on 10/7/07
      • Wants reference router ASAP for buffer sizing work with Neda
  • Washington University, St Loius: (board #21)
    • Project: Data mining / clustering application
    • Alpha role: Alpha test router with clustering plugin
    • Lead: John Lockwood (a NetFPGA developer Alpha user)
    • User: Adam Covington (a NetFPGA developer + Alpha user)
    • User: Jack Meier (Alpha user)
    • User: Chris Zuver (Alpha user)
    • Last contact: JWL to Chris and Jack on 10/4/07
  • Princeton University (board #24)
    • Project: VINI/Clean Slate application
    • Alpha role: Alpha test router
    • Lead: Jen Rexford
    • Student: Eric Keller (Alpha user + NetFPGA Developer)
    • Last contact: JWL to EricK on 10/1/07, 10/3/07, 10/4/07
  • Georgia Tech: (board #TBD)
    • Project: Path Splicing using NetFPGA
    • Alpha role: Alpha Test NetFPGA Router in a Dell 2950. Alpha tester of ordering process through Digilent Inc.
    • Lead: Nick Feamster: feamster@cc.gatech.edu
    • Student: Muhammad Bilal Anwer: bilal@cc.gatech.edu (Alpha User)
    • Last contact: JWL to NickF and Bilal on 10/4/07
  • North Carolina State University (NCSU)
    • Project: Alpha testing of NetFPGA in Dell Precision 370 and 390N rackmount servers.
    • Additional Interest: Multiple networking courses--at least one undergraduate and graduate course enhancement exercise set each.
    • Lead: Marhn Harvey Fullmer
    • Student: Vineet Ashok Kulkarni
    • Last contact: JWL and Marhn: Email and Phone: Oct 9, 2007
  • Cisco (Using boards at Stanford)
  • Agilent: (2 boards JAD: Ser#?)
    • Project: Synchronization with the NetFPGA
    • Alpha role: Provide input from a commercial user of the NetFPGA
    • Contact: Jad Naous (Alpha user + NetFPGA developer)

Additional participants must be approved by John Lockwood and Nick McKeown before being admitted to the alpha program.

NetFPGA Alpha Email List

Email the alpha user group as: netfpga-alpha@lists.stanford.edu

Management of the List: https://mailman.stanford.edu/mailman/listinfo/netfpga-alpha

Subscribers as of: 10/11/07:

Alpha Release Components

  • Reference Designs
    • Four Port NIC
      • Hardware bitfile
        • Contains modules from the Reference Router
        • Sub-set of modules composed by Jad
        • Alpha Tested by Brandon
        • Verified in lab on nf-test machines by Adam
      • Software driver
        • Linux/C code that provides nf2c interfaces
      • Scripts to program and start NIC
      • Regression tests to verify packet transmission
      • Documentation on Website: How to install and test the NIC
      • Circuit provided to external Alpha Tester (Nick Weaver)
      • Survey feedback incorporated for upcoming Beta Release
    • Router
      • Hardware bitfile
        • Glen's Reference Router
        • Router datapath provided by Jad
        • Alpha Tested by Brandon
        • Verified in Lab by Adam
      • Software Driver
      • Graphical User Interface (GUI)
      • Software Router (SR)
      • Scripts to start up and run router
      • Scripts to run regression tests
      • Documentation on Website: How to set up and test the Router
        • Based on Glen's Reference Router
        • Funtionality reduced by Jad
        • Alpha tested by Brandon
        • Verified in lab by Adam
  • Source Code
    • Four Port NIC
      • A .tar.gz packaged snapshot of the SVN
        • Uses moduels from the Reference Router
        • Funtionality reduced by Jad
        • Alpha tested by Brandon
        • Verified in lab by Adam
      • Scripts to synthesize Verilog source
      • Scripts to simulate source
      • Scripts to verify hardware
      • Documentation on Website
    • Reference Router
      • A .tar.gz packaged snapshot of the SVN
        • Based on Glen's Reference Router
        • Funtionality reduced by Jad
        • Alpha tested by Brandon
        • Verified in lab by Adam
      • Scripts to synthesize Verilog source
      • Scripts to simulate source
      • Scripts to verify hardware
      • Documentation on Website
  • Website Documentation
    • Teacher
    • Student
    • Researcher

Specification Testing

Testing

Alpha users are be expected to:

  1. Install the NetFPGA platform in a PC as per on-line documentation
  2. Install the CentOS, as per on-line documentation
  3. Install the NetFPGA driver, as per on-line documentation
  4. Run the self-test to verify the hardware is functional
  5. Test or or more of the NetFPGA activities, listed below

Alpha Test Activities

  1. Four-Port NIC Alpha Release 1.0
    1. Alpha release packaged in .tar.gz archive
      1. A snapshot of the state of the code in SVN
      2. A self-contained archive
      3. Not a link to a home directory
    2. Installation results must be repeatable
      1. First test will by Brandon at Stanford
      2. Second test will by Nick Weaver at ICSI
    3. Measured results
      1. Survey with feedback on installation process
        1. Any difficulties during install should be noted
        2. Any bugs in instructions should be noted
      2. Throughput measurements with iPerf
        1. Details provided about the source & target machine
        2. Experiments run for different size packets
    4. Details of deliverable described in link above
  2. Network Developers
    1. Install NetFPGA hardware in machines on a network
      1. Point-to-Point topology
      2. Ring topology with 3+ routers(like the tutorial)
      3. Other topology
      4. Show that ARP functions for all machines
      5. Achieve full connectivity via ping
    2. Prepare NetFPGA Reference Router
      1. Load the bitfile for the reference router
      2. Generate configuration files
      3. Load the Software Router (SR)
      4. Load the Java GUI
      5. Run the built-in tests for the Reference router, as per: http://netfpga.org/netfpgawiki/index.php/Reference_Router_Testing
    3. Run Functional tests to verify operations
  3. Hardware Developers
    1. Run ModelSim tools to simulate a full design
    2. Run Xilinx to synthesize a full design
    3. Program a NetFPGA and verify functionality in hardware
  4. Alpha Activities
    1. Develop a course at Rice based on CS344
    2. Implement a data mining application at WU
    3. Build an array of 40 NetFPGA systems
    4. Different alpha users can provide feedback on different activities

Activities for Volunteers at Stanford

  • Bring in a group of volunteers to repeat exercises
  • Carefully monitor (Videotape?) how they make progress on exercises
  • Update documentation and code to avoid future problems
  • Talk with the Alpha users by phone to obtain agreement that they will contribute to the program
  • GANT Chart with tasks and people

Documentation

Documentation about the project will be on-line from the NetFPGA homepage.

We require at least the following set of documentation:

Additional items to Document (Glen)

  • Structure of the Distribution
    • Overview the directory structure
    • Identify the important source code files
  • environment setup for simulation and synthesis
  • downloading instructions
  • basic overview of the modular router/switch designs
  • basic overview of software

Support

The NetFPGA is an open research platform.

Digilent Inc. fabricates and distributes the NetFPGA hardware. Digilent's role in the project is to provide hardware. Digilent does not support questions about software configuration or design changes to the NetFPGA's Verilog source code. They:

  • Ensure that cards are functional when they are shipped from the factory
  • Guarantee that the cards are still functional when received by customer
In both cases, the self-test is used to verify that the NetFPGA is operational, as documented on-line as: http://netfpga.org/NetFPGA_Self_Test_Procedure/Setup_Selftest_Pkg.html

NetFPGA.org is an organization that develops and distributes reference code for the NetFPGA paltforms. NetFPGA.org:

  • hosts a website
  • maintains email lists, and
  • runs Wiki to document the operation of the hardware.
Circuits released from the NetFPGA.org site are functionally tested using only the supported hardware platforms.

End-users are expected to be willing and able to:

  • navigate source code
  • use the web to read to the project's documentation
  • use the email list to ask and answer questions

NetFPGA.org Mailing Lists

Evaluation -- proceeding to beta testing

What regression and other testing we will do prior to moving to the Beta Testing Plan?

Suggested list:

  1. All documentation above must be written
  2. All documentation listed in the beta section must be written
  3. Installation issues raised by alpha testers must be resolved. This could involve fixing the problem, correcting/augmenting the documentation, providing better tools etc
  4. All users must report success in installation
  5. All users must report success in running simulations
  6. All users must report success in implementing designs
  7. Meet some desired standard for testing the base designs
  8. Creation of an agreed upon "distribution" for beta release

Dev,,Alpha
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Topic revision: r2 - 11 Jun 2010 - 23:37:54 - Main.AdamC