Important Dates

The contest is split into two challenges. Teams can participate in either or both challenges. Design challenges will be posted on the start date of the contest. The design teams have 120 days to produce a working implementation employing any HW and SW design methodology and targeting the NetFPGA development platform.

Contest starts on Feb 9^th 2010.
Contest ends on June 1^st 2010.

Challenges

Challenge 1: The Best Network Tester/Packet Capture system

There are a small number of very expensive packet generator and capture systems on the market, used for testing networks and network equipment. The goal of this design is to provide a usable, powerful and open-source alternative for use by universities and organizations unable to afford such expensive equipment.

Challenge 2: The Best Overall Network System Design

The goal is to design and implement a novel design on the NetFPGA system. Use your imagination to devise a new use case for the NetFPGA. We are looking for solutions utilizing the NetFPGA cards that perform significant networking functionality.

Prizes

The judges will pick 1^st, 2^nd and 3^rd place winners for each Challenge. A design can only win a single Challenge.

The 1^st place team will receive: $1,000 cash award, two NetFPGA-1G cards (or one NetFPGA-10G card when they become available), and the right to choose a school to receive 5 new NetFPGA-1G cards. Up to two team members of the 1^st place team will receive an expenses-paid trip (flight, hotel and registration) to come and present your design at a NetFPGA Developers Conference.

The 2^nd place team will receive $600 cash award.

The 3^rd place team will receive $400 cash award.

Getting Started

Interested participants should sign up on the NetFPGA website and propose a team and the competition category. Information about the NetFPGA program, tools and guidelines can be found at www.NetFPGA.org?.

Participants are highly encouraged to familiarize themselves with the NetFPGA platform hardware and design tools. Participants are also encouraged to familiarize themselves with the library of contributed NetFPGA designs. Design reuse is highly encouraged. Participants are encouraged to leverage an existing design as a starting point and build functionality on top of that. Of course, appropriate attribution and credit is required.

Contact Information

The Committee of Judges for the 2010 contest will be chaired by Nick McKeown at Stanford University. To be added to the mailing list, please visit https://mailman.stanford.edu/mailman/listinfo/netfpga-design-contest-2010.

Contact Email Address: netfpga-design-contest-2010@mailman.stanford.edu

Contest Rules

The Design Problem

Design suggestions and features will be posted on the NetFPGA website regularly and will also be emailed to all participating teams. Participating teams are free to implement any networking feature, protocol or functionality.

Tools and Platforms

You may use any HW and SW design methodology at your disposal. Formal methods are encouraged but not required. NetFPGA design tools and libraries can be found on the NetFPGA website.

Contest Judging and Evaluation Criteria

Your design will be judged for:

• Ease of use: can a new user quickly download, install, and try out the design?
• Features
• Usefulness: does this design fill a need? Does it have any active users?
• Extensibility: is the source code well-documented? Does it have a packet walkthrough? Are there examples of how to modify or extend the design?
• Performance: does the design operate at line rate?
• Creativity: is the design interesting and unexpected, and does it have any new ideas?

A subjective element of judging is based on the elegance of the solutions and the functionality as determined by the panel of judges. In addition, a design is judged for absolute performance in the objective portion of the judging.

The absolute performance is determined by a design’s ability to operate at line rate.

The winning designs must work correctly. We rely on the honor systems for initially reporting the performance data. In the case you should be among the top finishers, we will arrange verification of the correctness of your design and the performance data.

Eligibility and Entry Instructions

This contest is open to industry and academic institutions (faculty and/or students). A team may include both industry and academic members. There is no limit on the size of a team. There is no limit on the number of teams per institution.

Students, staff and faculty of Stanford, the Judges, and their immediate family members cannot participate in this competition.

To be eligible, all designs must be contributed to the NetFPGA repository. Instructions on how to contribute and the requirements are available on the NetFPGA website. All NetFPGA contributions are freely distributed under a BSD-style license. License details can be found at http://netfpga.org/foswiki/bin/view/NetFPGA/OneGig/License. If you have questions or concerns about licensing, please contact us.

The final submission details will be posted later. But, in general, you will be required to submit a short document describing the following items before June 1^st 2010:

• A description of your design methodology
• The organization of your design and its theory of operation
• A brief analysis of its performance (e.g., where is time spent and where are the bottlenecks).
• Documentation in the form of PowerPoint slides is perfectly acceptable.