NetFPGA Development

Development

Getting started:

• TBD

Resources:

• Developer's Guide -- Guide for developers working with the NetFPGA platform
• Register system reference -- Detailed information about the register system
• Register system configuration file element reference -- Reference for elements used in configuration files
• Verification -- Reference for the Python-based verification infrastructure (available in 3.0.0 and above)
• Device ID List -- List of device IDs allocated to projects

Contributing projects and modules

We encourage you to contribute as a Developer to the NetFPGA Community. Contributed projects can consist of hardware (Verilog gateware, behavioral code, and/or structural code), software(drivers, scripts, and/or GUIs), or a combination of both. Projects use the results of regression tests to define and verify their functionality.

To get started,

1. Contribute your Application in a way that others can use.
2. Create a Wiki page to describe your project. As an example, see the Wiki Page for the packet generator.
3. Find a beta tester to test out your code and documentation. Verify that an external user can successfully run the functions you defined by your regression tests.
4. Let us know when the project is ready. We'll post the link on the public site.
5. Update the NetFPGA Project table to include your project: Project Table.

A paper that describes how to contribute a module:

• Methodology to Contribute NetFPGA Modules, by G. Adam Covington, Glen Gibb, Jad Naous, John Lockwood, Nick McKeown; submitted to IEEE Microelectronics System Education (MSE), June 2009.

An example of a paper that describes a contributed project is on-line as:

• A Packet Generator on the NetFPGA Platform, by G. Adam Covington, Glen Gibb, John Lockwood, Nick McKeown; IEEE Symposium on. Field-Programmable Custom Computing Machines (FCCM), April 2009.