DevMeeting-2008 07 23

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  • (These notes updated during meeting and reflect changes as of 11:20am on July 23)

NetFPGA Developers Meeting

  • Location: Gates room 392,
  • Time: Wednesday, 9:30am-11am
  • Led by: John
  • Full-time Attendees: Glen, Adam, Jad, Sara, John, Jianying (all present)
  • Part-time Attendees: Paul, Neda, Nick (not present at this meeting)
  • Not Attending: David, Brandon, Alex (not this week)


Major Agenda Topics

Contents

NetFPGA Summer Camp : Aug 4-8

  • 26 Attendees are registered
    • Our attendees include
      • Academics from: MIT, Google, Princeton, GaTech, UWisc, UC Davis, GATech, UMass, Cambridge, Northwestern
      • Countries of: Brazil, Czech Rep, Germany, Japan, US, UK, Candada, Thailand
      • Companies: Cisco, Lockheed martin, NEC, Google
  • 20 Hotel reservations at SLAC are confirmed
    • The rest are local to silicon valley
  • Ann has arranged for most meals
    • Breakfast, lunch, and some dinners will be provided
  • Present Exercises
  • Day 1 tutorial material is set (Background tutorial)
  • Days 3-5 are set (Individual exercises)
  • Day 2 needs additional assignments

Assignments for Day #2

  • By next week, prepare a 1-hour assignment for summer camp attendees for Day #2
  • Assumptions
    • Attendees will have completed Day 1 background exercises
    • 75 minutes, each
  • Possible Exercises (We will discuss in the meeting)


Glen: Simulation Exercise

  • Running ModelSim with the NetFPGA testbench
    • Compile and simulate
    • View waveforms
  • Simple example - XOR the payload of the packet
    • Identify where the payload begins
    • Learn how to read a register across the PCI bus

Adam: Running the Regression Testing

  • Show attendees how run the regression tests
  • Have the group create one test (or code one of the existing) tests.
  • Synthesize the hardware
  • Regression Testing of the Encryption module
    • XOR each word with a private key stored in a register
      • Example value: 0xFFFFFFFF (would invert every bit of every byte)
      • Example value: 0xFF00FF00 (would invert every other byte)
      • Example value: 0x55555555 (would invert every other bit)


Sara: Measuring Time with the NetFPGA

  • Present a short background about PTP
  • Operates before the MAC
  • Review the block diagrams to understand how this example is similar to and differs from the reference pipeline.
  • Show PTP running on the nf-test machines
  • Roll the scope into Gates 104
  • Show the synchronization between pairs of machines?
  • Show a part of the relvant Verilog code

Jad: Using the NetFPGA Openflow Switch

  • Show how to use and test OpenFlow
  • But not show a live experiment
  • Discuss the LiveCD
    • Users could reboot each nf-test machine with a LiveCD
    • But the controller hasn't been tested in the multi-machine configuration

Jianying: Storing data in DRAM

  • Output Queue module
  • DRAM wrapper performs write and read
  • Experimental: simple exercise to buffer data in DRAM ?

Equipment Issues

  • Qnty=5 additional LCDs screens have been purchased for camp and tutorial
    • These are the same 24" Sceptre screens that we have in offices
    • By combining these screens with 5 from the office, we'll have enought for tutorial
      • {John, Adam, Jad, Glen, DavidE, and small 17" as backup}
  • Card or Machine purchase
    • Hold a Raffle for NetFPGA cards
      • 1st, 2nd, and 3rd prizes: NetFPGA card
    • We need all of the nf-test machines (4..14) for SIGCOMM the week later
    • Attendees can purchase cube machines from Jordan if they want to take home a PC
      • Jordan needs lead time to order parts

SIGCOMM Tutorial

  • John and Adam will drive nf-test equipement to SIGCOMM
  • Adam will Fly back on monday
  • Guido could drive back on Thursday, but wants a co-pilot

PTP Demo

  • The four NFTest machines can be assigned to addresses:
    • 172.27.74.{141..144} (next IP address after cluster)
    • Subnet 255.255.254.0 (23-bit mask)
    • Router: 172.27.74.1
  • Nodes 1-16 reserved for PTP demo
  • HP Scope can be attached to:
  • We need the PTP testing complete by next week so that the nf-test machines can be returned to the Flash lab for preparation of summer camp and the SIGCOMM tutorials.

NetFPGA Cluster Update (John)

  • Nodes 1-16 available for PTP testing
  • Nodes 17-20 reserved for MVM SIGCOMM Demo
  • Nodes 29-36 fully connected to Cisco/LinkSys Switch
    • Migrate Sara from nf-test10 to nfc29 ?
    • Migrate Glen from nf-test5 to nfc30 ?
      • Copy files
    • Migrate Jianying from nf-test11 to nfc31 ?
    • Migrate Rohan from nf-test7 to nf-test2 or 3
  • Nodes 37-40 directly connected to HP Procurve Switch
  • http://netfpga.org/netfpgawiki/index.php/NetFGPA_Cluster

Outstanding issues

University of Utah (Adam)

  • Is Utah's DMA Timeout issue resolved with 1.2 R2 release?
  • Yes, timeout issue fixed
  • But regression test still has a few lost packets
    • Their machine has the eth1 and eth2 on a PCI card adjacent to the NetFPGA

LiveCD (Jad)

  • Does Grub.conf bootloader allocate 256M?
  • Yes, working

OpenFlow RPM and SRPM

  • From: http://software.opensuse.org/search
    • Search: NetFPGA OpenFlow
    • Found on July 21: netfpga-openflow-switch-beta.1.2-13.1.i586.rpm
    • New package is 1.2-15
  • Documentation needs to go into the guide (Jad)

Website update

New lot of 500 boards

  • John and Adam spoke to Jim O'Dell on Monday, July 21.
  • Power planes on first board are working, but self-test fails
  • Jim is having Taiwan ship card #1 to Stanford

Update on DDR2 (Jianying)

  • Corner cases
    • Refresh at the end of a read block
    • Document DRAM on Wiki Page
  • Current status of DRAM
    • Block size is 2036 bytes
    • Refresh cycle shortened from 7us to 1us to exercise
    • Simulation has been run continously for a week
    • Wrapper sythesizes and meets timing but does not run in hardware
      • UCF File from self-test is being used
      • Neither success counter nor failure counters are incrementing
        • Verify that DDR clock is running?
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