DevMeeting-2008 08 29

From NetFPGAWiki

• Preparations for Czech Republic Tutorial
  • 5 Machines have arrived
    • Passing regression test
  • 6 Machines en-route
    • Sent last week by Jordan
  • John/Adam
    • Fly SFO > FRA (Frankfort) - Tuesday, Sept 2
    • Fly FRA > BRQ (Brno) - Wednesday, Sept 3
    • Setup - Thursday, Sept 4
    • Tutorial - Friday, Sept 5
    • Lecture - Saturday, Sept 6
    • Drive to Heildelberg - Sunday, Sept 7
    • FPL Demo - Monday, Sept 8
    • John Flys back - Tues, Sept 9
    • John back in office, Wed, Sept 10

• Packet Generator
  • Available now as a package
  • Simple YUM install
  • Documentation on the Wiki

• OpenFlow
  • LiveCD - A good way to play with the NetFPGA for tutorials
    • but downside is that configuration is preset rather
    • We would like to configure 3-4 OpenFlow switches
  • CentOS - OpenFlow package
    • Would need to package software and hardware
    • A package with the verilog could be created quickly
  • Using Version 0x83
  • Also needs kernel module for OpenFlow
  • In the tutorial the command-line version was used
  • How to demonstrate the NetFPGA/OpenFlow
    • The simple-controller version
    • Run iPerf on PCI-e to RX, Packet generator to TX
      • NetFPGA
      • Software
    • Could create a topology of 3-4 Switches

• New Lot of Qnty=500 NetFPGAs
  • 2nd test card from Taiwan received yesterday
  • voltage test passes (after DC/DC regulator replacement)
  • Card can be programmed
  • But it failed self-test
  • register test fails
  • May be a solder connection to the FPGA
  • Glen will call Jim by 3pm
    • Decide whether to proceed with next 3 boards

• Feedback from SIGCOMM

• Tilera (VJ)
  • Have provided quote for $10k for Tilera hardware + software
  • Require symetric NDA signed by each developer
  • We need to explore partnering option

• Xilinx/Intel/Stanford 10GE
  • 1:30pm on Sept 10
  • V5 on low-profile PCIe
  • Most inexpensive option
  • SRAM, no DRAM