Researchers
From NetFPGAWiki
The NetFPGA for Researchers
Below is a list of academic papers and references generally related to the use of Reconfigurable hardware for high-speed networking. To see contributed circuits implemented specfically for the NetFPGA, see the contributed page. Feel free to add to this Wiki page with links to relevant projects and papers.
IDS/IDP, Pattern matching, firewalls
- IDS/IDP papers pattern matching, content filters, Snort offload, worm detection, firewall
Content Processing and String Matching
- FPGA-based Grep/Sed/Awk (including worm and virus scanning)
IP Lookup and Packet Classfication
- Lookup and Packet Classification: Tries, Shape-shifting tries, Bloom filters
- Bloom Filters: Fash hashing, header processing, payload scanning
Buffering and Queueuing
- Buffering and Queueing: Per-flow queueing, multi-channel buffers
Protocol Processing
- IP Protocol Wrappers: Frame processing, IP packet processing, UDP/IP processing
TCP/IP Flow processing
- TCP/IP Flow Processing: Best-effort flow reconstruction and state tracking
Semantic Processing
- Content Processing Semantic processing, langauge identification
Classfication and Clustering
Reconfigurable Hardware Platforms
- Reconfigurable Hardware Platforms: Partial bitfile manipulation, evolvable hardware, dynamic plugins
- Dynamic Reconfiguration: Thermal control, secure reconfiguration
Soft-core CPUS on FPGAs
- Soft-core processing (Liquid Architecture): LEON soft-core processor, hardware-assisted profiling
Related Stanford University Projects
- Stanford Clean Slate Program
- Umbrella project for next-generation network research
- OpenFlow
- Multi-vendor enterprise and campus network
- Rate Control Protocol (RCP)
- A new congestion control algorithm designed for fast download times.
- Ethane – a backwards compatible NAC (Network Access Control) architecture for enterprise networks.
- Buffer Sizing – investigating the effects of buffer size on throughput/loss/etc.
Other Related Network Hardware Research Projects
- Intrusion Detection – hardware-based line-rate packet classification by ICSI.
- XORP: eXtensible Open Router Platform
- Open source software router platform
- Supports BGP4+ and RIP for unicast routing
- Supports PIM-SM and IGMP/MLD for multicast
- Can push routes down in to hardware tables on a platform like the NetFPGA
- XORP is free. It is covered by a BSD-style license.
- It is publicly available for research, development, and use.
Graduate Research courses using Networked FPGAs
- CSE566: Reconfigurable System on Chip Design
- TCP/IP Processing, Fall 2004, Prof. John W. Lockwood
- CoE535: Acceleration of Networking Algorithms in Reconfigurable Hardware
- Statistics and Bloom Filters, Fall 2003, Prof. John W. Lockwood
- CSE536: Reconfigurable System on Chip Design
- QoS and SPAM, Fall 2002, Prof. John W. Lockwood
- CoE535: Acceleration of Networking Algorithms in Reconfigurable Hardware
- Protocol Wrappers and HW/SW Co-Design: Fall 2001, Prof. John W. Lockwood
Publications from the Reconfigurable Network Group
Academic conferences
- ACM SIGCOMM Conference
- IEEE Hot Interconnects (HotI)
- IEEE Symposium on Field-Programmable Custom Computing Machines
- International Conference on Field Programmable Logic and Applications
- FPGA Conference
Additional Network Hardware Related Topics
- Feel free to add relevant projects to this list
Liberouter
- http://www.liberouter.org/
- Combo cards
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