2nd North American NetFPGA Developers Workshop 2010
You already know that the NetFPGA implements a Gigabit NIC, A hardware-accelerated Internet router, a traffic generator, and an OpenFlow switch, and more. What else can it do? We invite you, our NetFPGA Developers, to join us at Stanford to see the newest NetFPGA Modules. Attend the workshop to see presentations and demonstrations of the latest network hardware and software.
- Agenda: Schedule
- Workshop Dates:
- Demonstration Setup (for authors): Aug. 12, 2010
- Workshop Presentations & Demonstrations: Aug. 13, 2010
- Papers Due:
Monday 14 Jun 2010 6:00:00pm PDT
- Location
- Event Registration
To cover Breakfasts, Snacks, Lunch, and Dinner
- Early Registration: Before July 14
- Late Registration: After July 14
- Registration Site
- Hotel: Stanford Guest House
- Rooms at $109/Night
- Transporation
- Nearby Airports: San Francisco (SFO) or San Jose (SJC)
- Marguerite: Free Shuttle Service on Stanford Campus
- CalTrain: Green alternative to renting a car
- Links for Authors
- Encouraging Reusable Network Hardware Design
- Steps to Contribute your Project
- Submit paper 4-8 page, ACM-style
- General/Organizing Chair
- G. Adam Covington, Stanford University
- Program Chairs
- Yashar Ganjali, Univerity of Toronto
- Andrew W. Moore, Cambridge University
- Program Committee
- Satnam Singh, Microsoft Research Cambridge
- Paul Rodman, Google
- Gordon Brebner, Xilinx
- Martin Žádník, Brno University of Technology
- Glen Gibb, Stanford University
- James Zeng, Stanford University
- Scott Whyte, Google
- Eric Keller, Princeton University
- Jad Naous, Stanford Univerity
- Greg Steffen, University of Toronto
- John Lockwood, Algo-Logic Systems
- Sue Moon, KAIST