The NetFPGA is the low-cost reconfigurable hardware platform optimized for high-speed networking. The NetFPGA includes the all fo the logic resources, memory, and Gigabit Ethernet interfaces necessary to build a complete switch, router, and/or security device. Because the entire datapath is implemented in hardware, the system can support back-to-back packets at full Gigabit line rates and has a processing latency measured in only a few clock cycles.
| Title | Organisation | Documentation |
|---|---|---|
| IPv4 Reference Router | Stanford University | Wiki |
| Quad-Port Gigabit NIC | Stanford University | Wiki |
| Ethernet Switch | Stanford University | Wiki |
| Buffer Monitoring System | Stanford University | Wiki |
| Hardware-Accelerated Linux Router | Stanford University | Wiki |
| DRAM-Router | Stanford University | Wiki |
| DRAM-Queue Test | Stanford University | Wiki |
| Packet Generator | Stanford University | Wiki |
| OpenFlow Switch | Stanford University | Wiki |
| NetFlow Probe | Brno University | Wiki |
| AirFPGA | Stanford University | Wiki |
| Fast Reroute & Multipath Router | Stanford University | Wiki |
| NetThreads | University of Toronto | Wiki |
| NetThreads-RE | University of Toronto | Wiki |
| NetTM | University of Toronto | Wiki |
| Precise Traffic Generator | University of Toronto | Wiki |
| URL Extraction | Univ. of New South Wales | Wiki |
| zFilter Sprouter (Pub/Sub) | Ericsson | Wiki |
| Windows Driver | Microsoft Research | Wiki |
| RED | Stanford University | Wiki |
| Open Network Lab | Washington University | Wiki |
| DFA | UMass Lowell | Wiki |
| G/PaX | Xilinx | Wiki |
| RCP Router | Stanford University | Wiki |
| Deficit Round Robin (DRR) | Stanford University | Wiki |
| OpenFlow-MPLS Switch | Ericsson | Wiki |
| PTP-enabled Router | Stanford University | Wiki |
| Vlan Tag Handler | Stanford University | Wiki |
| Port Aggregator | Stanford University | Wiki |
| IP Lookup w/Blooming Tree | University of Pisa | Wiki |
| KOREN Testbed | Chungnam-Korea | Wiki |
| Virtual Data Plane | Georgia Tech | Wiki |
| Deficit Round Robin (DRR) Input Arbiter | Universidade Federal do Rio Grande do Sul (Brazil) | Wiki |
| Counter Braids | Stanford (Lu, Jianying) | Wiki |
| Ethernet Switch with Real-time support | University of Waterloo and Universidad de Concepcion | Wiki |
| End-to-End Ethernet Authorization | Euskal Herriko Unibertsitateko | Wiki |
| Ultra-high Speed Congestion-control | University of North Carolina | Wiki |
| Promiscuous Reference Router | University of Catania | Wiki |
| BORPH (Operating System) | University of Hong Kong / University of Cape Town | Wiki |
| Traffic Monitor | University of Catania | Wiki |
| Latency Measurement Module | Algo-Logic Systems | Wiki |
| NetFPGA Logic Analyzer | USC/ISI | Wiki |
| Bounded Jitter Policy | University of Toronto | Wiki |
| Traffic Classifier | University of Toronto | Wiki |
| Network IO Fairness | Georgia Tech | Wiki |
| Tunneling OpenFlow Switch with ICMP | Stanford University | Wiki |
| zFormation PSrouter (Pub/Sub) | Ericsson | Wiki |
| High Performance Packet Classifier | University of Pisa | Wiki |
| Flexible Router | University of Catania | Wiki |
| Monitoring System | University of Pisa / University of Cambridge | Wiki |
| Deficit Round Robin Router Backplane | Cairo University | Wiki |
| NetCoding Project Transmit Node | ? | Download |
| Router Buffer Adaptation | University of New South Wales | Wiki |
Where can I buy a NetFPGA 1G platform
It seems that my board is broken, what should I do?
What if I have Hardware problems with my boards?
What if I have Software problems with my board?
You can exchange your ideas and questions with the NetFPGA community here.
How can I get involved with the NetFPGA project?
How can I obtain the gateware and software package?
Once you have used the NetFPGA, we hope that you will contribute to the project.
You can find our Wiki here.