NetFPGA Sydney Tutorial

Hands-on with the NetFPGA to build a Gigabit-rate Router at NICTA

Presented by: John W. Lockwood, Glen Gibb, and Jad Naous of the: High Performance Network Group at Stanford University

Hosted by: Lavy Libman and Philip Allen NICTA (National ICT Australia) and School of Electrical Engineering and Telecommunications The University of New South Wales (UNSW)

Date: Wednesday, February 6, 2008

Time: 9am - 5pm

Location: Lab343A at the University of New South Wales School of Electrical Engineering and Telecommunications building (G17) Kensington campus, Sydney, Australia

To Register to attend, send email here with a subject line of "I plan to attend the NetFPGA tutorial" and a message that includes your name, title, organisation, and contact information.


An open platform called the NetFPGA has been developed at Stanford University. The NetFPGA platform enables researchers and instructors to build high-speed, hardware-accelerated networking systems. The platform can be used in the classroom to teach students how to build Ethernet switches and Internet Prototcol (IP) routers using hardware rather than software. The platform can be used by researchers to prototype advanced services for next-generation networks.

By using Field Programmable Gate Arrays (FPGAs), the NetFPGA enables new types of packet routing circuits to be implemented and detailed measurements of network traffic to be obtained. During the tutorial, we will use the NetFPGA to determine the amount of memory needed to buffer TCP/IP data streaming through the Gigabit/second router. Hardware circuits within the NetFPGA will be implemented to measure and plot the occupancy of buffers. Circuits will be downloaded into reconfigurable hardware and tested with live, streaming Internet video traffic.

This full-day hands-on tutorial will be held in Sydney on Wednesday, February 6.


Attendees will utilize a Linux-based PC equipped with NetFPGA hardware. A basic understanding of Ethernet switching and network routing is expected. Past experience with Verilog is useful but not required. This full-day tutorial extends the material presented at the Hot Interconnects tutorial and the SIGMETRICS tutorials in 2007.

A photo of a NetFPGA tutorial


  • Introduction to the operation of an Internet Router
    • Control Plane
      • Routing protocols
      • Routing table
      • Management interfaces
    • Datapath
      • Longest Prefix Match (LPM)
      • Classless Interdomain Routing (CIDR)
      • Header processing
      • Packet buffering
  • The NetFPGA Router
    • Hardware
      • Gigabit Ethernet interfaces
      • Field Programmable Gate Array (FPGA) Logic
      • Random Access Memory (RAM)
    • Software
      • Kernel-space driver
      • User-space applications
      • PCI interface
  • Demonstration Topology
      • Hardware
        • Network of ten routers
        • Ethernet switch
        • Video server
        • High Definition (HD) video client
      • Software
        • PW-OSPF
        • Routing tables
        • Dynamic re-routing
  • Integrated Circuit Design
    • Technologies
      • Look-Up Tables (LUTs)
      • Configurable Logic Blocks (CLBs)
      • Field Programmable Gate Arrays (FPGAs)
    • Verilog Hardware Description Language (HDL)
      • Registers, integers, arrays
      • Multiplexers
      • Synchronous storage elements
      • Finite State Machines (FSMs)
    • Hardware Debug
      • Waveform monitor
      • In-circuit logic emulation
  • NetFPGA System Components
    • Synthesis of tutorial router
    • Java-based Graphical User Interface (GUI)
      • Configuration
      • Statistics
    • Router Architecture
      • Pipeline
      • Queues
  • Buffer Size Experiment
    • Experiment with TCP/IP flows
      • Rule-of-thumb for the buffer size
      • Round-trip propation delay
      • Capacity of bottlneck link
      • Number of active flows
    • Lower delay with smaller queues
  • Enhanced Router
    • Additional hardware
      • Event capture module
      • Rate limiter
      • Delay module
    • Experiments
      • Netperf
      • HD video transport
    • Life of packet through the system
      • Description of blocks
      • Waveforms

About the presentors

  • John W. Lockwood
    John W. Lockwood is a Consulting Associate Professor at Stanford University. At Stanford, he leads the NetFPGA Alpha and Beta release programs and organizes the worldwide tutorial program. Lockwood was granted tenure in the Department of Computer Science and Engineering at Washington University in Saint Louis in 2006. At Washington University in St. Louis, Lockwood led the Reconfigurable Network Group (RNG) to develop the Field programmable Port Extender (FPX) to enable rapid prototype of extensible network modules in Field Programmable Gate Array (FPGA) technology. Lockwood's research interests include reconfigurable hardware, Internet security, and content processing technologies. Dr. Lockwood earned his Ph.D from the Department of Electrical and Computer Engineering at the University of Illinois.

    John Lockwood has served as the principal investigator on grants from the National Science Foundation, Xilinx, Altera, Nortel Networks, Rockwell Collins, and Boeing. He has worked in industry for AT&T Bell Laboratories, IBM, Science Applications International Corporation (SAIC), and the National Center for Supercomputing Applications (NCSA). He served as a co-founder of Global Velocity, a networking startup company focused on high-speed data security. He is a member of IEEE, ACM, Tau Beta Pi, and Eta Kappa Nu.

  • Glen Gibb
    Glen is a PhD candidate in Electrical Engineering at Stanford University. He received his Master of Science in Electrical Engineering from Stanford University and a Bachelor of Science and a Bachelor of Engineering from The University of Melbourne in Australia. He has been working on the NetFPGA platform since 2004 and was the lead designer for the current hardware version.

  • Jad Naous
    Jad Naous received his B.Eng. degree in Computer Engineering from McGill University in 2005, and his M.S.E.E. degree from Stanford University in 2007. He is currently pursuing a doctorate in Electrical Engineering at Stanford University. He has previously worked as a Graduate Intern for Sun Microsystems Labs in 2006, where he worked on the next generation switch project. In 2007, he joined Agilent Technologies Labs as a Graduate Intern where he helped implement special devices for the IEEE1588 Precision Time Protocol using NetFPGA.

  • Lavy Libman
    Lavy Libman received his B.Sc. degrees in Electrical Engineering and in Computer Engineering, and his M.Sc. and Ph.D. degrees in Electrical Engineering, from the Technion - Israel Institute of Technology, Haifa, Israel, in 1992, 1997, and 2003, respectively. He is currently a researcher at the Networked Systems research group at NICTA (formerly National ICT Australia), Sydney, which he joined in September 2003. He previously held several visiting and consulting positions, including with Bell Laboratories in summer 2002, where he participated in a research team on path restoration in optical networks, and with Millimetrix Broadband Networks in summer 2000, where he took part in the specification of the Unity. system. Between 1993 and 1999, he served as a computer engineer in the Israel Defence Forces.

    Dr. Libman is a member of the IEEE Communications Society. He currently co-chairs the Track on Protocols and Algorithms for Wireless Networks in ICCCN 2008. He was the chair of the Cross-Layer Design and Optimization track of ICCCN 2007 and a co-chair of the Workshop on Networking in Public Transport (WNEPT 2006). In addition, he serves as a technical program committee member for several international conferences, including IEEE Infocom, IEEE LCN, IEEE VTC, QShine, and WiOpt.

    Dr. Libman is a member and a local representative of the Australian Communications Research Network (ACoRN).

  • Philip Allen
    Philip Allen works in the area of networking and photonics within the School of Electrical Engineering and Telecommunications at the University of New South Wales where he manages the networking laboratories. Philip earned his B.E. from UNSW and is working on a Masters of Business and Technology. Philip has worked has worked at Thorn-EMI Limited U.K. and Geoterrex (now Fugro Airborne Surveys).

Photos From the Event

To Attend this Event

To Register to attend, send email here with a subject line of "I plan to attend the NetFPGA tutorial" and a message that includes your name, title, organisation, and contact information. For accomodations, rooms can be booked at hotels near UNSW